I’d say it’s more an unfortunate consequence of confusing industry terminology. Sub-nanometer refers to the process, not the finished size of the chip. Smaller processes can fit more transistors in the same space.

I’m a software engineer at a large company you may not have heard of, but you almost certainly know at least one of their brands. Abstraction layers are all over the place; they’re not a symptom of open-source software, they’re a symptom of lots of modern software.